πŸ“š Computer Organization & Architecture

Unit 1: Basic Computer Organization & Data Representation

✨ Created by Ankush Raj ✨

πŸ’» 1. Digital Computer

Definition: A digital computer is an electronic machine that processes and stores information in the form of binary digits (0s and 1s). It accepts input, stores data, processes instructions using arithmetic and logical operations, and outputs final results. Computer works based on the stored program concept, meaning the instructions reside in memory and the CPU fetches them one by one.

Key Characteristics

βœ… Processes data in binary (0s and 1s)
βœ… Works on stored program concept
βœ… Executes instructions sequentially
βœ… Performs arithmetic & logical operations
βœ… Stores data and instructions in memory
Examples: Personal computers, Laptops, Smartphones, Tablets, Industrial control systems, Embedded systems

πŸ”§ 2. Functional Units of a Computer

Definition: A computer is divided into 5 major functional units, each performing a specific role in the processing of data and execution of instructions.
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β”‚ COMPUTER SYSTEM β”‚
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β”‚Input β”‚Memoryβ”‚ ALU β”‚ CU β”‚ Output β”‚
β””β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”˜

1. Input Unit

Definition

The input unit is responsible for receiving raw data and user instructions. It converts human-readable form into binary and sends it to the computer's memory or CPU for processing.

Functions:

  • Accepts data from user
  • Converts data into machine-readable format (binary)
  • Sends data to memory/CPU
Examples:
  • Keyboard - Text input
  • Mouse - Point and click
  • Scanner - Image input
  • Microphone - Audio input
  • Webcam - Video input
  • Barcode Scanner - Product codes

2. Output Unit

Definition

The output unit provides the processed information to the user in a readable form. It converts digital output back into human-understandable form.

Functions:

  • Receives processed data from CPU
  • Converts binary to human-readable format
  • Displays/outputs results to user
Examples:
  • Monitor - Visual output
  • Printer - Paper output
  • Speakers - Audio output
  • Projector - Large display
  • Plotter - Technical drawings

3. Memory Unit

Definition

The memory unit stores instructions, data, intermediate results, and final outputs. It consists of high-speed temporary memory (RAM) and permanent memory (ROM).

Types of Memory:

A) Primary Memory (Main Memory)
Type Full Form Characteristics
RAM Random Access Memory Volatile, Fast, Temporary storage
ROM Read Only Memory Non-volatile, Permanent, Read-only
Cache Cache Memory Very fast, Small size, CPU internal
B) Secondary Memory (Storage)
Examples:
  • HDD (Hard Disk Drive) - Magnetic storage
  • SSD (Solid State Drive) - Flash storage
  • USB Drive - Portable storage
  • CD/DVD - Optical storage
  • Memory Card - Removable storage

Memory Hierarchy:

Fastest & Smallest ↓ Registers (CPU internal) ↓ Cache Memory (L1, L2, L3) ↓ RAM (Main Memory) ↓ Secondary Storage (HDD/SSD) ↓ Slowest & Largest

4. ALU (Arithmetic and Logic Unit)

Definition

The ALU performs all arithmetic operations (addition, subtraction, multiplication, division) and logical operations (AND, OR, NOT, compare). It is the "mathematical brain" of the computer.

Functions:

Arithmetic Operations:
  • Addition (+)
  • Subtraction (-)
  • Multiplication (Γ—)
  • Division (Γ·)
Logical Operations:
  • AND - Both conditions true
  • OR - At least one true
  • NOT - Negation/Inversion
  • XOR - Exclusive OR
  • Compare - Check equality
Example: When you calculate 5 + 3 in a calculator, the ALU performs the addition operation and produces result 8.

5. Control Unit (CU)

Definition

The CU controls and coordinates all components of the computer. It fetches instructions from memory, decodes them, generates control signals, and directs ALU, memory, and I/O units to perform tasks.

Functions:

  1. Fetch - Retrieves instruction from memory
  2. Decode - Interprets the instruction
  3. Execute - Sends control signals to execute
  4. Coordinate - Manages timing & synchronization
Control Unit (CU)
↓ Control Signals
β”œβ”€β”€ ALU
β”œβ”€β”€ Memory
β”œβ”€β”€ Input
└── Output
Key Point: The Control Unit acts like a traffic controller, managing all operations and ensuring smooth execution of instructions.

πŸ“¦ 3. Computer Registers

Definition: Registers are high-speed small storage units inside the CPU used to hold intermediate data, addresses, instructions, and results. They are faster than cache and memory.

Main CPU Registers

Register Full Name Function
PC Program Counter Holds address of next instruction to be executed
IR Instruction Register Stores current instruction being executed
MAR Memory Address Register Stores memory address to be accessed
MDR Memory Data Register Stores data fetched from or to be written to memory
ACC Accumulator Stores results of arithmetic and logical operations
SR Status Register Stores flags (carry, zero, overflow, sign)

Register Operations Example

Instruction: ADD R1, R2 Step 1: PC points to instruction address Step 2: Instruction loaded into IR Step 3: Control Unit decodes IR Step 4: ALU adds values from R1 and R2 Step 5: Result stored in Accumulator Step 6: PC incremented to next instruction
Speed Comparison:
Registers (Fastest) > Cache > RAM > Secondary Storage (Slowest)

🚌 4. System Bus Structure

Definition: A bus is a communication pathway consisting of multiple wires that transfer data, addresses, and control signals among CPU, memory, and I/O devices.
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β”‚ CPU β”‚
β””β”€β”€β”€β”€β”¬β”€β”€β”€β”€β”˜
β”‚
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β”‚ SYSTEM BUS β”‚
β”œβ”€β”€β”€β”€β”¬β”€β”€β”€β”€β”¬β”€β”€β”€β”€β”€β”€β”€β”€
β”‚Dataβ”‚Addrβ”‚Controlβ”‚
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β”‚
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β”‚ Memory β”‚ I/O
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Types of Buses

1. Data Bus

Definition

The data bus carries actual data between the CPU, memory, and I/O devices. It is bidirectional, meaning data flows both into and out of the CPU.

Characteristics:

  • Direction: Bidirectional (↔)
  • Width: 8-bit, 16-bit, 32-bit, 64-bit
  • Function: Transfers actual data
Example: A 64-bit processor uses a 64-bit data bus allowing 8 bytes of data transfer in one cycle β†’ faster performance.

Bus Width Impact:

8-bit bus = 1 byte per cycle 16-bit bus = 2 bytes per cycle 32-bit bus = 4 bytes per cycle 64-bit bus = 8 bytes per cycle (Fastest)

2. Address Bus

Definition

The address bus carries the location/address of data in memory so the CPU knows where to read/write data. It is unidirectional (CPU β†’ memory).

Characteristics:

  • Direction: Unidirectional (CPU β†’ Memory)
  • Width: Determines addressable memory
  • Function: Specifies memory location

Addressable Memory Calculation:

Address Bus Width Addressable Memory Calculation
16-bit 64 KB 216 = 65,536 bytes
20-bit 1 MB 220 = 1,048,576 bytes
32-bit 4 GB 232 = 4,294,967,296 bytes
64-bit 16 EB 264 = 16 Exabytes
Example: A 32-bit address bus can address up to 4 GB of memory (232 = 4,294,967,296 bytes).

3. Control Bus

Definition

The control bus carries all control and timing signals used to manage communication between components.

Characteristics:

  • Direction: Bidirectional
  • Function: Carries control signals

Control Signals:

  • Read - Read data from memory
  • Write - Write data to memory
  • Clock - Synchronization signal
  • Interrupt - Request CPU attention
  • Acknowledge - Confirm signal received
  • Reset - System reset signal
  • Bus Request - Request bus access
  • Bus Grant - Grant bus access

Bus Comparison

Bus Type Direction Purpose Width Matters?
Data Bus Bidirectional Transfer data Yes (affects speed)
Address Bus Unidirectional Specify location Yes (affects memory size)
Control Bus Bidirectional Control signals No (varies by design)

πŸ—ΊοΈ 5. Memory & I/O Addressing

Memory Addressing

Definition: CPU assigns a unique address to each memory location to read/write data efficiently.
Example:
Memory Address Data
0x0000 10101100
0x0001 11110000
0x0002 00110011
0x0003 10011001

I/O Addressing Methods

1. Memory-Mapped I/O

Definition

I/O devices share the same address space as memory. Same instructions used for both memory and I/O operations.

Advantages:
βœ… Same instructions for memory and I/O
βœ… No special I/O instructions needed
βœ… Flexible addressing
Disadvantages:
❌ Reduces available memory address space
❌ Slower I/O operations
Address Space:
0x0000 - 0x7FFF β†’ Memory
0x8000 - 0xFFFF β†’ I/O Devices

2. Isolated I/O (Port-Mapped I/O)

Definition

Separate address space for I/O devices. Special instructions (IN, OUT) used for I/O operations.

Advantages:
βœ… Full memory address space available
βœ… Faster I/O operations
βœ… Clear separation between memory and I/O
Disadvantages:
❌ Requires special I/O instructions
❌ Limited I/O address space
Memory Instructions: MOV AX, [1000H] ; Read from memory MOV [2000H], BX ; Write to memory I/O Instructions: IN AL, 80H ; Read from I/O port 80H OUT 90H, AL ; Write to I/O port 90H

Comparison: Memory-Mapped vs Isolated I/O

Feature Memory-Mapped I/O Isolated I/O
Address Space Shared with memory Separate
Instructions MOV, LOAD, STORE IN, OUT
Memory Available Reduced Full
Speed Slower Faster
Example ARM processors Intel x86

πŸ”’ 1. Fixed-Point Representation

Definition: In fixed-point representation, the binary point (decimal point in binary) is placed at a fixed position. Primarily used for storing integers. Positive and negative numbers are represented using sign magnitude, 1's complement, or 2's complement.

Integer Representation Methods

1. Sign-Magnitude Representation

Format: MSB (Most Significant Bit) represents sign

  • 0 = Positive
  • 1 = Negative
Example (8-bit):
+13 = 0 0001101 ↑ (0 = positive) -13 = 1 0001101 ↑ (1 = negative)
Problems:
❌ Two representations of zero (+0 and -0)
❌ Complex arithmetic operations

2. 1's Complement

Method: Invert all bits (0β†’1, 1β†’0)

Example:
+13 = 00001101 -13 = 11110010 (1's complement) (Invert all bits of +13)
Problems:
❌ Still has two zeros (+0 and -0)
❌ Requires end-around carry in addition

3. 2's Complement (Most Commonly Used)

Method: 2's complement = 1's complement + 1

Example:
+13 = 00001101 Step 1: 1's complement 11110010 Step 2: Add 1 11110010 + 1 ────────── -13 = 11110011 (2's complement)
Advantages:
βœ… Only one representation of zero
βœ… Simple arithmetic operations
βœ… Subtraction = Addition of 2's complement
βœ… Most widely used method

Quick Method to Find 2's Complement:

Starting from right: Keep all 0s as is until first 1 Keep first 1 as is Invert all remaining bits Example: +13 = 00001101 ↑ From right: 1101 stays, then invert Result: 11110011

Range of Numbers

Bits Sign-Magnitude 1's Complement 2's Complement
4-bit -7 to +7 -7 to +7 -8 to +7
8-bit -127 to +127 -127 to +127 -128 to +127
16-bit -32767 to +32767 -32767 to +32767 -32768 to +32767
Formula for 2's Complement Range: -2(n-1) to +2(n-1)-1

🌊 2. Floating-Point Representation

Definition: Floating-point representation is used to store real numbers (fractions and very large numbers). A number is represented using mantissa (significant digits) and exponent (power of 2).

Floating-Point Format

N = Mantissa Γ— 2Exponent Or N = M Γ— 2E

IEEE 754 Standard

Single Precision (32-bit)

|Sign| Exponent | Mantissa |
| 1 | 8 | 23 |
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bit bits bits

Double Precision (64-bit)

|Sign| Exponent | Mantissa |
| 1 | 11 | 52 |
β””β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜
bit bits bits

Components

Component Description Example
Sign Bit 0 = Positive, 1 = Negative 0 for +ve, 1 for -ve
Exponent Power of 2 (biased) Bias = 127 (32-bit)
Mantissa Significant digits (normalized) 1.xxxxx format

Example: Representing 13.0

Step 1: Convert to binary 13.0 = 1101.0 Step 2: Normalize (1.xxx format) 1101.0 = 1.101 Γ— 2Β³ Step 3: Extract components Sign = 0 (positive) Mantissa = 101 (after binary point) Exponent = 3 Step 4: Add bias (127 for 32-bit) Biased Exponent = 3 + 127 = 130 Binary: 10000010 Final Representation (32-bit): | 0 | 10000010 | 10100000000000000000000 | Sign Exponent Mantissa

Special Values

Value Exponent Mantissa
Zero All 0s All 0s
Infinity All 1s All 0s
NaN (Not a Number) All 1s Non-zero
Applications:
βœ… Scientific computing
βœ… Graphics processing
βœ… Financial calculations
βœ… Engineering simulations

βž• 3. Fixed-Point Arithmetic

Binary Addition

Rules:
0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 (0 with carry 1) 1 + 1 + 1 = 11 (1 with carry 1)
Example 1: Simple Addition
1011 (11 in decimal) 0110 (6 in decimal) ────── 10001 (17 in decimal) Carry: 1 1 1 0 1 1 + 0 1 1 0 ───────── 1 0 0 0 1
Example 2: With Multiple Carries
1111 (15) + 0001 (1) ────── 10000 (16) Carry: 1111 1 1 1 1 + 0 0 0 1 ───────── 1 0 0 0 0

Binary Subtraction using 2's Complement

Method: A - B = A + (2's complement of B)
Example: 13 - 6
A = 13 = 00001101 B = 6 = 00000110 Step 1: Find 2's complement of B 1's complement of 6: 11111001 Add 1: + 1 ─────────── 2's complement: 11111010 Step 2: Add A + 2's complement of B 00001101 (13) 11111010 (-6 in 2's complement) ────────── 1 00000111 (7) ↑ Discard carry Result = 7 βœ“

Overflow Detection

When does overflow occur?

  • Adding two positive numbers gives negative result
  • Adding two negative numbers gives positive result

Overflow Detection Rule:

Overflow occurs when carry into MSB β‰  carry out of MSB

Example: Overflow (4-bit system)
0111 (+7) 0010 (+2) ────── 1001 (-7 in 2's complement) ← WRONG! Overflow occurred! Expected: +9, but 4-bit can only hold -8 to +7

βœ–οΈ 4. Binary Multiplication Algorithms

1. Add-and-Shift Algorithm

Definition: Binary multiplication by checking each bit of multiplier. If bit = 1, add multiplicand; then shift left. Simple but slow.
Example: 5 Γ— 3 (101 Γ— 011)
Multiplicand: 101 (5) Multiplier: 011 (3) Step-by-step: 101 Γ— 011 ───── 101 (101 Γ— 1) 101 (101 Γ— 1, shifted left) 000 (101 Γ— 0, shifted left) ───── 1111 (15 in decimal) βœ“

Algorithm Steps:

  1. Initialize product = 0
  2. For each bit of multiplier (right to left):
    • If bit = 1, add multiplicand to product
    • Shift multiplicand left
  3. Repeat until all bits processed

2. Booth's Algorithm

Definition: Booth's algorithm efficiently multiplies signed binary numbers. It reduces the number of additions/subtractions by encoding sequences of bits.

Booth's Encoding Rules:

Current Bit Previous Bit Operation
0 0 Shift only (no operation)
0 1 Add multiplicand
1 0 Subtract multiplicand
1 1 Shift only (no operation)

Why Booth's Algorithm?

Advantages:
βœ… Handles signed numbers directly
βœ… Reduces number of operations
βœ… Efficient for sequences of 1s or 0s
βœ… Faster than simple add-and-shift
Example: Multiplying using Booth's
Multiplicand: 0110 (6) Multiplier: 1111 (-1) 1111 represents string of 1s Booth encoding: Instead of 4 additions, do: 1 subtraction at start + shifts Result: 11111010 (-6) βœ“

Key Insight:

Sequence "1111" can be encoded as: 10000 - 00001 = subtract once, then shift multiple times (fewer operations!)

πŸ’Ύ 1. Levels of Programming Languages

High Level β†’ Assembly β†’ Machine
(Python) (ADD A,B) (01101010) ↓ ↓ ↓ Easy Medium Difficult
Slow Fast Fastest
Portable Less Machine-specific

1. Machine Language

Characteristics:

  • Binary code (0s and 1s)
  • Directly executed by CPU
  • Fastest execution
  • Machine-specific
Example:
10110000 01100001 ; Load value into register
βœ… Fastest execution
βœ… No translation needed
❌ Extremely difficult to write
❌ Error-prone
❌ Not portable
❌ Hard to debug

2. Assembly Language

Characteristics:

  • Uses mnemonics (symbolic names)
  • Converted by assembler
  • One-to-one mapping with machine code
  • Low-level language
Example:
MOV AX, 5 ; Move 5 into AX register ADD BX, AX ; Add AX to BX MOV [100], BX ; Store result at memory 100
βœ… More readable than machine code
βœ… Faster execution
βœ… Direct hardware control
βœ… Memory efficient
❌ Machine-dependent
❌ Difficult to learn
❌ Time-consuming to write

Common Mnemonics:

Mnemonic Operation Example
MOV Move/Copy data MOV AX, BX
ADD Addition ADD AX, 5
SUB Subtraction SUB BX, CX
MUL Multiplication MUL DX
JMP Jump/Branch JMP LABEL
CMP Compare CMP AX, BX

3. High-Level Language

Characteristics:

  • English-like syntax
  • Portable across platforms
  • Requires compiler/interpreter
  • Easy to learn and write
Example (C language):
int a = 5; int b = 10; int sum = a + b; printf("Sum = %d", sum);
βœ… Easy to write and understand
βœ… Portable across machines
βœ… Faster development
βœ… Better debugging tools
βœ… Maintainable code
❌ Slower execution
❌ Requires compiler/interpreter
❌ Less control over hardware

Popular High-Level Languages:

  • C - System programming
  • C++ - Object-oriented programming
  • Java - Platform-independent
  • Python - Scripting, AI/ML
  • JavaScript - Address Bus Width Addressable Memory Calculation 16-bit 64 KB 216 = 65,536 bytes 20-bit 1 MB 220 = 1,048,576 bytes 32-bit 4 GB 232 = 4,294,967,296 bytes 64-bit 16 EB 264 = 16 Exabytes
    Example: A 32-bit address bus can address up to 4 GB of memory (232 = 4,294,967,296 bytes).

3. Control Bus

Definition

The control bus carries all control and timing signals used to manage communication between components.

Characteristics:

  • Direction: Bidirectional
  • Function: Carries control signals

Control Signals:

  • Read - Read data from memory
  • Write - Write data to memory
  • Clock - Synchronization signal
  • Interrupt - Request CPU attention
  • Acknowledge - Confirm signal received
  • Reset - System reset signal
  • Bus Request - Request bus access
  • Bus Grant - Grant bus access

Bus Comparison

Bus Type Direction Purpose Width Matters?
Data Bus Bidirectional Transfer data Yes (affects speed)
Address Bus Unidirectional Specify location Yes (affects memory size)
Control Bus Bidirectional Control signals No (varies by design)

πŸ—ΊοΈ 5. Memory & I/O Addressing

Memory Addressing

Definition: CPU assigns a unique address to each memory location to read/write data efficiently.
Example:
Memory Address Data
0x0000 10101100
0x0001 11110000
0x0002 00110011
0x0003 10011001

I/O Addressing Methods

1. Memory-Mapped I/O

Definition

I/O devices share the same address space as memory. Same instructions used for both memory and I/O operations.

Advantages:
βœ… Same instructions for memory and I/O
βœ… No special I/O instructions needed
βœ… Flexible addressing
Disadvantages:
❌ Reduces available memory address space
❌ Slower I/O operations
Address Space:
0x0000 - 0x7FFF β†’ Memory
0x8000 - 0xFFFF β†’ I/O Devices

2. Isolated I/O (Port-Mapped I/O)

Definition

Separate address space for I/O devices. Special instructions (IN, OUT) used for I/O operations.

Advantages:
βœ… Full memory address space available
βœ… Faster I/O operations
βœ… Clear separation between memory and I/O
Disadvantages:
❌ Requires special I/O instructions
❌ Limited I/O address space
Memory Instructions: MOV AX, [1000H] ; Read from memory MOV [2000H], BX ; Write to memory I/O Instructions: IN AL, 80H ; Read from I/O port 80H OUT 90H, AL ; Write to I/O port 90H

Comparison: Memory-Mapped vs Isolated I/O

Feature Memory-Mapped I/O Isolated I/O
Address Space Shared with memory Separate
Instructions MOV, LOAD, STORE IN, OUT
Memory Available Reduced Full
Speed Slower Faster
Example ARM processors Intel x86

πŸ”’ 1. Fixed-Point Representation

Definition: In fixed-point representation, the binary point (decimal point in binary) is placed at a fixed position. Primarily used for storing integers. Positive and negative numbers are represented using sign magnitude, 1's complement, or 2's complement.

Integer Representation Methods

1. Sign-Magnitude Representation

Format: MSB (Most Significant Bit) represents sign

  • 0 = Positive
  • 1 = Negative
Example (8-bit):
+13 = 0 0001101 ↑ (0 = positive) -13 = 1 0001101 ↑ (1 = negative)
Problems:
❌ Two representations of zero (+0 and -0)
❌ Complex arithmetic operations

2. 1's Complement

Method: Invert all bits (0β†’1, 1β†’0)

Example:
+13 = 00001101 -13 = 11110010 (1's complement) (Invert all bits of +13)
Problems:
❌ Still has two zeros (+0 and -0)
❌ Requires end-around carry in addition

3. 2's Complement (Most Commonly Used)

Method: 2's complement = 1's complement + 1

Example:
+13 = 00001101 Step 1: 1's complement 11110010 Step 2: Add 1 11110010 + 1 ────────── -13 = 11110011 (2's complement)
Advantages:
βœ… Only one representation of zero
βœ… Simple arithmetic operations
βœ… Subtraction = Addition of 2's complement
βœ… Most widely used method

Quick Method to Find 2's Complement:

Starting from right: Keep all 0s as is until first 1 Keep first 1 as is Invert all remaining bits Example: +13 = 00001101 ↑ From right: 1101 stays, then invert Result: 11110011

Range of Numbers

Bits Sign-Magnitude 1's Complement 2's Complement
4-bit -7 to +7 -7 to +7 -8 to +7
8-bit -127 to +127 -127 to +127 -128 to +127
16-bit -32767 to +32767 -32767 to +32767 -32768 to +32767
Formula for 2's Complement Range: -2(n-1) to +2(n-1)-1

🌊 2. Floating-Point Representation

Definition: Floating-point representation is used to store real numbers (fractions and very large numbers). A number is represented using mantissa (significant digits) and exponent (power of 2).

Floating-Point Format

N = Mantissa Γ— 2Exponent Or N = M Γ— 2E

IEEE 754 Standard

Single Precision (32-bit)

|Sign| Exponent | Mantissa |
| 1 | 8 | 23 |
β””β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜
bit bits bits

Double Precision (64-bit)

|Sign| Exponent | Mantissa |
| 1 | 11 | 52 |
β””β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜
bit bits bits

Components

Component Description Example
Sign Bit 0 = Positive, 1 = Negative 0 for +ve, 1 for -ve
Exponent Power of 2 (biased) Bias = 127 (32-bit)
Mantissa Significant digits (normalized) 1.xxxxx format

Example: Representing 13.0

Step 1: Convert to binary 13.0 = 1101.0 Step 2: Normalize (1.xxx format) 1101.0 = 1.101 Γ— 2Β³ Step 3: Extract components Sign = 0 (positive) Mantissa = 101 (after binary point) Exponent = 3 Step 4: Add bias (127 for 32-bit) Biased Exponent = 3 + 127 = 130 Binary: 10000010 Final Representation (32-bit): | 0 | 10000010 | 10100000000000000000000 | Sign Exponent Mantissa

Special Values

Value Exponent Mantissa
Zero All 0s All 0s
Infinity All 1s All 0s
NaN (Not a Number) All 1s Non-zero
Applications:
βœ… Scientific computing
βœ… Graphics processing
βœ… Financial calculations
βœ… Engineering simulations

βž• 3. Fixed-Point Arithmetic

Binary Addition

Rules:
0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 (0 with carry 1) 1 + 1 + 1 = 11 (1 with carry 1)
Example 1: Simple Addition
1011 (11 in decimal) 0110 (6 in decimal) ────── 10001 (17 in decimal) Carry: 1 1 1 0 1 1 + 0 1 1 0 ───────── 1 0 0 0 1
Example 2: With Multiple Carries
1111 (15) + 0001 (1) ────── 10000 (16) Carry: 1111 1 1 1 1 + 0 0 0 1 ───────── 1 0 0 0 0

Binary Subtraction using 2's Complement

Method: A - B = A + (2's complement of B)
Example: 13 - 6
A = 13 = 00001101 B = 6 = 00000110 Step 1: Find 2's complement of B 1's complement of 6: 11111001 Add 1: + 1 ─────────── 2's complement: 11111010 Step 2: Add A + 2's complement of B 00001101 (13) 11111010 (-6 in 2's complement) ────────── 1 00000111 (7) ↑ Discard carry Result = 7 βœ“

Overflow Detection

When does overflow occur?

  • Adding two positive numbers gives negative result
  • Adding two negative numbers gives positive result

Overflow Detection Rule:

Overflow occurs when carry into MSB β‰  carry out of MSB

Example: Overflow (4-bit system)
0111 (+7) 0010 (+2) ────── 1001 (-7 in 2's complement) ← WRONG! Overflow occurred! Expected: +9, but 4-bit can only hold -8 to +7

βœ–οΈ 4. Binary Multiplication Algorithms

1. Add-and-Shift Algorithm

Definition: Binary multiplication by checking each bit of multiplier. If bit = 1, add multiplicand; then shift left. Simple but slow.
Example: 5 Γ— 3 (101 Γ— 011)
Multiplicand: 101 (5) Multiplier: 011 (3) Step-by-step: 101 Γ— 011 ───── 101 (101 Γ— 1) 101 (101 Γ— 1, shifted left) 000 (101 Γ— 0, shifted left) ───── 1111 (15 in decimal) βœ“

Algorithm Steps:

  1. Initialize product = 0
  2. For each bit of multiplier (right to left):
    • If bit = 1, add multiplicand to product
    • Shift multiplicand left
  3. Repeat until all bits processed

2. Booth's Algorithm

Definition: Booth's algorithm efficiently multiplies signed binary numbers. It reduces the number of additions/subtractions by encoding sequences of bits.

Booth's Encoding Rules:

Current Bit Previous Bit Operation
0 0 Shift only (no operation)
0 1 Add multiplicand
1 0 Subtract multiplicand
1 1 Shift only (no operation)

Why Booth's Algorithm?

Advantages:
βœ… Handles signed numbers directly
βœ… Reduces number of operations
βœ… Efficient for sequences of 1s or 0s
βœ… Faster than simple add-and-shift
Example: Multiplying using Booth's
Multiplicand: 0110 (6) Multiplier: 1111 (-1) 1111 represents string of 1s Booth encoding: Instead of 4 additions, do: 1 subtraction at start + shifts Result: 11111010 (-6) βœ“

Key Insight:

Sequence "1111" can be encoded as: 10000 - 00001 = subtract once, then shift multiple times (fewer operations!)

πŸ’Ύ 1. Levels of Programming Languages

High Level β†’ Assembly β†’ Machine
(Python) (ADD A,B) (01101010) ↓ ↓ ↓ Easy Medium Difficult
Slow Fast Fastest
Portable Less Machine-specific

1. Machine Language

Characteristics:

  • Binary code (0s and 1s)
  • Directly executed by CPU
  • Fastest execution
  • Machine-specific
Example:
10110000 01100001 ; Load value into register
βœ… Fastest execution
βœ… No translation needed
❌ Extremely difficult to write
❌ Error-prone
❌ Not portable
❌ Hard to debug

2. Assembly Language

Characteristics:

  • Uses mnemonics (symbolic names)
  • Converted by assembler
  • One-to-one mapping with machine code
  • Low-level language
Example:
MOV AX, 5 ; Move 5 into AX register ADD BX, AX ; Add AX to BX MOV [100], BX ; Store result at memory 100
βœ… More readable than machine code
βœ… Faster execution
βœ… Direct hardware control
βœ… Memory efficient
❌ Machine-dependent
❌ Difficult to learn
❌ Time-consuming to write

Common Mnemonics:

Mnemonic Operation Example
MOV Move/Copy data MOV AX, BX
ADD Addition ADD AX, 5
SUB Subtraction SUB BX, CX
MUL Multiplication MUL DX
JMP Jump/Branch JMP LABEL
CMP Compare CMP AX, BX

3. High-Level Language

Characteristics:

  • English-like syntax
  • Portable across platforms
  • Requires compiler/interpreter
  • Easy to learn and write
Example (C language):
int a = 5; int b = 10; int sum = a + b; printf("Sum = %d", sum);
βœ… Easy to write and understand
βœ… Portable across machines
βœ… Faster development
βœ… Better debugging tools
βœ… Maintainable code
❌ Slower execution
❌ Requires compiler/interpreter
❌ Less control over hardware

Popular High-Level Languages:

  • C - System programming
  • C++ - Object-oriented programming
  • Java - Platform-independent
  • Python - Scripting, AI/ML
  • JavaScript - Fastest Constants Register MOV AX, BX Very Fast Temp data Direct MOV AX, [1000] Fast Variables Indirect MOV AX, [BX] Slow Pointers Indexed MOV AX, [BX+SI] Medium Arrays

    πŸ”Ή Instruction Types

    DATA TRANSFER β†’ MOV, LOAD, STORE ARITHMETIC β†’ ADD, SUB, MUL, DIV LOGICAL β†’ AND, OR, NOT, XOR CONTROL β†’ JMP, CALL, RET I/O β†’ IN, OUT

    πŸ”Ή Instruction Format

    | Opcode | Operand(s) | Addressing Mode | Components: Opcode: Operation to perform Operand: Data or address Mode: How to access operand

    πŸ”Ή I/O Addressing

    Memory-Mapped I/O

    βœ… Same instructions

    ❌ Reduces memory

    Uses: MOV, LOAD

    Isolated I/O

    βœ… Full memory available

    βœ… Faster

    Uses: IN, OUT

    πŸ”Ή Last-Minute Formula Sheet

    βœ… Addressable Memory = 2^n (n = address bus width) βœ… 2's Complement = 1's complement + 1 βœ… Range (n-bit 2's complement) = -2^(n-1) to +2^(n-1)-1 βœ… Floating-Point = M Γ— 2^E (M = Mantissa, E = Exponent)

    πŸ”Ή Important One-Liners for Exam

    βœ” ALU = Arithmetic & Logic operations
    βœ” CU = Controls all units
    βœ” Data bus is bidirectional
    βœ” Address bus is unidirectional
    βœ” 2's complement most widely used
    βœ” Booth's algorithm handles signed numbers
    βœ” Immediate addressing is fastest
    βœ” Machine cycle: F β†’ D β†’ E
    βœ” Registers faster than cache & memory
    βœ” PC holds next instruction address

    πŸ”Ή Exam Tips

    If question asks:
    • "Fastest addressing?" β†’ Immediate or Register
    • "Bidirectional bus?" β†’ Data Bus
    • "Signed numbers?" β†’ 2's Complement
    • "Real numbers?" β†’ Floating-Point
    • "Array access?" β†’ Indexed Addressing
    • "Controls CPU?" β†’ Control Unit
    • "Machine cycle steps?" β†’ Fetch, Decode, Execute
    • "32-bit address bus memory?" β†’ 4 GB

πŸ“š Computer Organization & Architecture - Unit 1 Digital Notes

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