π» 1. Digital Computer
Key Characteristics
β Works on stored program concept
β Executes instructions sequentially
β Performs arithmetic & logical operations
β Stores data and instructions in memory
π§ 2. Functional Units of a Computer
β COMPUTER SYSTEM β
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βInput βMemoryβ ALU β CU β Output β
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1. Input Unit
Definition
The input unit is responsible for receiving raw data and user instructions. It converts human-readable form into binary and sends it to the computer's memory or CPU for processing.
Functions:
- Accepts data from user
- Converts data into machine-readable format (binary)
- Sends data to memory/CPU
- Keyboard - Text input
- Mouse - Point and click
- Scanner - Image input
- Microphone - Audio input
- Webcam - Video input
- Barcode Scanner - Product codes
2. Output Unit
Definition
The output unit provides the processed information to the user in a readable form. It converts digital output back into human-understandable form.
Functions:
- Receives processed data from CPU
- Converts binary to human-readable format
- Displays/outputs results to user
- Monitor - Visual output
- Printer - Paper output
- Speakers - Audio output
- Projector - Large display
- Plotter - Technical drawings
3. Memory Unit
Definition
The memory unit stores instructions, data, intermediate results, and final outputs. It consists of high-speed temporary memory (RAM) and permanent memory (ROM).
Types of Memory:
A) Primary Memory (Main Memory)| Type | Full Form | Characteristics |
|---|---|---|
| RAM | Random Access Memory | Volatile, Fast, Temporary storage |
| ROM | Read Only Memory | Non-volatile, Permanent, Read-only |
| Cache | Cache Memory | Very fast, Small size, CPU internal |
- HDD (Hard Disk Drive) - Magnetic storage
- SSD (Solid State Drive) - Flash storage
- USB Drive - Portable storage
- CD/DVD - Optical storage
- Memory Card - Removable storage
Memory Hierarchy:
4. ALU (Arithmetic and Logic Unit)
Definition
The ALU performs all arithmetic operations (addition, subtraction, multiplication, division) and logical operations (AND, OR, NOT, compare). It is the "mathematical brain" of the computer.
Functions:
Arithmetic Operations:- Addition (+)
- Subtraction (-)
- Multiplication (Γ)
- Division (Γ·)
- AND - Both conditions true
- OR - At least one true
- NOT - Negation/Inversion
- XOR - Exclusive OR
- Compare - Check equality
5. Control Unit (CU)
Definition
The CU controls and coordinates all components of the computer. It fetches instructions from memory, decodes them, generates control signals, and directs ALU, memory, and I/O units to perform tasks.
Functions:
- Fetch - Retrieves instruction from memory
- Decode - Interprets the instruction
- Execute - Sends control signals to execute
- Coordinate - Manages timing & synchronization
β Control Signals
βββ ALU
βββ Memory
βββ Input
βββ Output
π¦ 3. Computer Registers
Main CPU Registers
| Register | Full Name | Function |
|---|---|---|
| PC | Program Counter | Holds address of next instruction to be executed |
| IR | Instruction Register | Stores current instruction being executed |
| MAR | Memory Address Register | Stores memory address to be accessed |
| MDR | Memory Data Register | Stores data fetched from or to be written to memory |
| ACC | Accumulator | Stores results of arithmetic and logical operations |
| SR | Status Register | Stores flags (carry, zero, overflow, sign) |
Register Operations Example
Registers (Fastest) > Cache > RAM > Secondary Storage (Slowest)
π 4. System Bus Structure
β CPU β
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β
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β SYSTEM BUS β
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βDataβAddrβControlβ
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β
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β Memory β I/O
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Types of Buses
1. Data Bus
Definition
The data bus carries actual data between the CPU, memory, and I/O devices. It is bidirectional, meaning data flows both into and out of the CPU.
Characteristics:
- Direction: Bidirectional (β)
- Width: 8-bit, 16-bit, 32-bit, 64-bit
- Function: Transfers actual data
Bus Width Impact:
2. Address Bus
Definition
The address bus carries the location/address of data in memory so the CPU knows where to read/write data. It is unidirectional (CPU β memory).
Characteristics:
- Direction: Unidirectional (CPU β Memory)
- Width: Determines addressable memory
- Function: Specifies memory location
Addressable Memory Calculation:
| Address Bus Width | Addressable Memory | Calculation |
|---|---|---|
| 16-bit | 64 KB | 216 = 65,536 bytes |
| 20-bit | 1 MB | 220 = 1,048,576 bytes |
| 32-bit | 4 GB | 232 = 4,294,967,296 bytes |
| 64-bit | 16 EB | 264 = 16 Exabytes |
3. Control Bus
Definition
The control bus carries all control and timing signals used to manage communication between components.
Characteristics:
- Direction: Bidirectional
- Function: Carries control signals
Control Signals:
- Read - Read data from memory
- Write - Write data to memory
- Clock - Synchronization signal
- Interrupt - Request CPU attention
- Acknowledge - Confirm signal received
- Reset - System reset signal
- Bus Request - Request bus access
- Bus Grant - Grant bus access
Bus Comparison
| Bus Type | Direction | Purpose | Width Matters? |
|---|---|---|---|
| Data Bus | Bidirectional | Transfer data | Yes (affects speed) |
| Address Bus | Unidirectional | Specify location | Yes (affects memory size) |
| Control Bus | Bidirectional | Control signals | No (varies by design) |
πΊοΈ 5. Memory & I/O Addressing
Memory Addressing
0x0000 10101100
0x0001 11110000
0x0002 00110011
0x0003 10011001
I/O Addressing Methods
1. Memory-Mapped I/O
Definition
I/O devices share the same address space as memory. Same instructions used for both memory and I/O operations.
β Same instructions for memory and I/O
β No special I/O instructions needed
β Flexible addressing
β Reduces available memory address space
β Slower I/O operations
0x0000 - 0x7FFF β Memory
0x8000 - 0xFFFF β I/O Devices
2. Isolated I/O (Port-Mapped I/O)
Definition
Separate address space for I/O devices. Special instructions (IN, OUT) used for I/O operations.
β Full memory address space available
β Faster I/O operations
β Clear separation between memory and I/O
β Requires special I/O instructions
β Limited I/O address space
Comparison: Memory-Mapped vs Isolated I/O
| Feature | Memory-Mapped I/O | Isolated I/O |
|---|---|---|
| Address Space | Shared with memory | Separate |
| Instructions | MOV, LOAD, STORE | IN, OUT |
| Memory Available | Reduced | Full |
| Speed | Slower | Faster |
| Example | ARM processors | Intel x86 |
π’ 1. Fixed-Point Representation
Integer Representation Methods
1. Sign-Magnitude Representation
Format: MSB (Most Significant Bit) represents sign
- 0 = Positive
- 1 = Negative
β Two representations of zero (+0 and -0)
β Complex arithmetic operations
2. 1's Complement
Method: Invert all bits (0β1, 1β0)
β Still has two zeros (+0 and -0)
β Requires end-around carry in addition
3. 2's Complement (Most Commonly Used)
Method: 2's complement = 1's complement + 1
β Only one representation of zero
β Simple arithmetic operations
β Subtraction = Addition of 2's complement
β Most widely used method
Quick Method to Find 2's Complement:
Range of Numbers
| Bits | Sign-Magnitude | 1's Complement | 2's Complement |
|---|---|---|---|
| 4-bit | -7 to +7 | -7 to +7 | -8 to +7 |
| 8-bit | -127 to +127 | -127 to +127 | -128 to +127 |
| 16-bit | -32767 to +32767 | -32767 to +32767 | -32768 to +32767 |
π 2. Floating-Point Representation
Floating-Point Format
IEEE 754 Standard
Single Precision (32-bit)
| 1 | 8 | 23 |
ββββββ΄ββββββββββββ΄ββββββββββββββββββββ
bit bits bits
Double Precision (64-bit)
| 1 | 11 | 52 |
ββββββ΄ββββββββββββ΄ββββββββββββββββββββββββββ
bit bits bits
Components
| Component | Description | Example |
|---|---|---|
| Sign Bit | 0 = Positive, 1 = Negative | 0 for +ve, 1 for -ve |
| Exponent | Power of 2 (biased) | Bias = 127 (32-bit) |
| Mantissa | Significant digits (normalized) | 1.xxxxx format |
Example: Representing 13.0
Special Values
| Value | Exponent | Mantissa |
|---|---|---|
| Zero | All 0s | All 0s |
| Infinity | All 1s | All 0s |
| NaN (Not a Number) | All 1s | Non-zero |
β Scientific computing
β Graphics processing
β Financial calculations
β Engineering simulations
β 3. Fixed-Point Arithmetic
Binary Addition
Binary Subtraction using 2's Complement
Overflow Detection
When does overflow occur?
- Adding two positive numbers gives negative result
- Adding two negative numbers gives positive result
Overflow Detection Rule:
Overflow occurs when carry into MSB β carry out of MSB
βοΈ 4. Binary Multiplication Algorithms
1. Add-and-Shift Algorithm
Algorithm Steps:
- Initialize product = 0
- For each bit of multiplier (right to left):
- If bit = 1, add multiplicand to product
- Shift multiplicand left
- Repeat until all bits processed
2. Booth's Algorithm
Booth's Encoding Rules:
| Current Bit | Previous Bit | Operation |
|---|---|---|
| 0 | 0 | Shift only (no operation) |
| 0 | 1 | Add multiplicand |
| 1 | 0 | Subtract multiplicand |
| 1 | 1 | Shift only (no operation) |
Why Booth's Algorithm?
β Handles signed numbers directly
β Reduces number of operations
β Efficient for sequences of 1s or 0s
β Faster than simple add-and-shift
Key Insight:
πΎ 1. Levels of Programming Languages
(Python) (ADD A,B) (01101010) β β β Easy Medium Difficult
Slow Fast Fastest
Portable Less Machine-specific
1. Machine Language
Characteristics:
- Binary code (0s and 1s)
- Directly executed by CPU
- Fastest execution
- Machine-specific
β No translation needed
β Error-prone
β Not portable
β Hard to debug
2. Assembly Language
Characteristics:
- Uses mnemonics (symbolic names)
- Converted by assembler
- One-to-one mapping with machine code
- Low-level language
β Faster execution
β Direct hardware control
β Memory efficient
β Difficult to learn
β Time-consuming to write
Common Mnemonics:
| Mnemonic | Operation | Example |
|---|---|---|
| MOV | Move/Copy data | MOV AX, BX |
| ADD | Addition | ADD AX, 5 |
| SUB | Subtraction | SUB BX, CX |
| MUL | Multiplication | MUL DX |
| JMP | Jump/Branch | JMP LABEL |
| CMP | Compare | CMP AX, BX |
3. High-Level Language
Characteristics:
- English-like syntax
- Portable across platforms
- Requires compiler/interpreter
- Easy to learn and write
β Portable across machines
β Faster development
β Better debugging tools
β Maintainable code
β Requires compiler/interpreter
β Less control over hardware
Popular High-Level Languages:
- C - System programming
- C++ - Object-oriented programming
- Java - Platform-independent
- Python - Scripting, AI/ML
- JavaScript -
Address Bus Width Addressable Memory Calculation 16-bit 64 KB 216 = 65,536 bytes 20-bit 1 MB 220 = 1,048,576 bytes 32-bit 4 GB 232 = 4,294,967,296 bytes 64-bit 16 EB 264 = 16 Exabytes Example: A 32-bit address bus can address up to 4 GB of memory (232 = 4,294,967,296 bytes).
3. Control Bus
Definition
The control bus carries all control and timing signals used to manage communication between components.
Characteristics:
- Direction: Bidirectional
- Function: Carries control signals
Control Signals:
- Read - Read data from memory
- Write - Write data to memory
- Clock - Synchronization signal
- Interrupt - Request CPU attention
- Acknowledge - Confirm signal received
- Reset - System reset signal
- Bus Request - Request bus access
- Bus Grant - Grant bus access
Bus Comparison
| Bus Type | Direction | Purpose | Width Matters? |
|---|---|---|---|
| Data Bus | Bidirectional | Transfer data | Yes (affects speed) |
| Address Bus | Unidirectional | Specify location | Yes (affects memory size) |
| Control Bus | Bidirectional | Control signals | No (varies by design) |
πΊοΈ 5. Memory & I/O Addressing
Memory Addressing
0x0000 10101100
0x0001 11110000
0x0002 00110011
0x0003 10011001
I/O Addressing Methods
1. Memory-Mapped I/O
Definition
I/O devices share the same address space as memory. Same instructions used for both memory and I/O operations.
β Same instructions for memory and I/O
β No special I/O instructions needed
β Flexible addressing
β Reduces available memory address space
β Slower I/O operations
0x0000 - 0x7FFF β Memory
0x8000 - 0xFFFF β I/O Devices
2. Isolated I/O (Port-Mapped I/O)
Definition
Separate address space for I/O devices. Special instructions (IN, OUT) used for I/O operations.
β Full memory address space available
β Faster I/O operations
β Clear separation between memory and I/O
β Requires special I/O instructions
β Limited I/O address space
Comparison: Memory-Mapped vs Isolated I/O
| Feature | Memory-Mapped I/O | Isolated I/O |
|---|---|---|
| Address Space | Shared with memory | Separate |
| Instructions | MOV, LOAD, STORE | IN, OUT |
| Memory Available | Reduced | Full |
| Speed | Slower | Faster |
| Example | ARM processors | Intel x86 |
π’ 1. Fixed-Point Representation
Integer Representation Methods
1. Sign-Magnitude Representation
Format: MSB (Most Significant Bit) represents sign
- 0 = Positive
- 1 = Negative
β Two representations of zero (+0 and -0)
β Complex arithmetic operations
2. 1's Complement
Method: Invert all bits (0β1, 1β0)
β Still has two zeros (+0 and -0)
β Requires end-around carry in addition
3. 2's Complement (Most Commonly Used)
Method: 2's complement = 1's complement + 1
β Only one representation of zero
β Simple arithmetic operations
β Subtraction = Addition of 2's complement
β Most widely used method
Quick Method to Find 2's Complement:
Range of Numbers
| Bits | Sign-Magnitude | 1's Complement | 2's Complement |
|---|---|---|---|
| 4-bit | -7 to +7 | -7 to +7 | -8 to +7 |
| 8-bit | -127 to +127 | -127 to +127 | -128 to +127 |
| 16-bit | -32767 to +32767 | -32767 to +32767 | -32768 to +32767 |
π 2. Floating-Point Representation
Floating-Point Format
IEEE 754 Standard
Single Precision (32-bit)
| 1 | 8 | 23 |
ββββββ΄ββββββββββββ΄ββββββββββββββββββββ
bit bits bits
Double Precision (64-bit)
| 1 | 11 | 52 |
ββββββ΄ββββββββββββ΄ββββββββββββββββββββββββββ
bit bits bits
Components
| Component | Description | Example |
|---|---|---|
| Sign Bit | 0 = Positive, 1 = Negative | 0 for +ve, 1 for -ve |
| Exponent | Power of 2 (biased) | Bias = 127 (32-bit) |
| Mantissa | Significant digits (normalized) | 1.xxxxx format |
Example: Representing 13.0
Special Values
| Value | Exponent | Mantissa |
|---|---|---|
| Zero | All 0s | All 0s |
| Infinity | All 1s | All 0s |
| NaN (Not a Number) | All 1s | Non-zero |
β Scientific computing
β Graphics processing
β Financial calculations
β Engineering simulations
β 3. Fixed-Point Arithmetic
Binary Addition
Binary Subtraction using 2's Complement
Overflow Detection
When does overflow occur?
- Adding two positive numbers gives negative result
- Adding two negative numbers gives positive result
Overflow Detection Rule:
Overflow occurs when carry into MSB β carry out of MSB
βοΈ 4. Binary Multiplication Algorithms
1. Add-and-Shift Algorithm
Algorithm Steps:
- Initialize product = 0
- For each bit of multiplier (right to left):
- If bit = 1, add multiplicand to product
- Shift multiplicand left
- Repeat until all bits processed
2. Booth's Algorithm
Booth's Encoding Rules:
| Current Bit | Previous Bit | Operation |
|---|---|---|
| 0 | 0 | Shift only (no operation) |
| 0 | 1 | Add multiplicand |
| 1 | 0 | Subtract multiplicand |
| 1 | 1 | Shift only (no operation) |
Why Booth's Algorithm?
β Handles signed numbers directly
β Reduces number of operations
β Efficient for sequences of 1s or 0s
β Faster than simple add-and-shift
Key Insight:
πΎ 1. Levels of Programming Languages
(Python) (ADD A,B) (01101010) β β β Easy Medium Difficult
Slow Fast Fastest
Portable Less Machine-specific
1. Machine Language
Characteristics:
- Binary code (0s and 1s)
- Directly executed by CPU
- Fastest execution
- Machine-specific
β No translation needed
β Error-prone
β Not portable
β Hard to debug
2. Assembly Language
Characteristics:
- Uses mnemonics (symbolic names)
- Converted by assembler
- One-to-one mapping with machine code
- Low-level language
β Faster execution
β Direct hardware control
β Memory efficient
β Difficult to learn
β Time-consuming to write
Common Mnemonics:
| Mnemonic | Operation | Example |
|---|---|---|
| MOV | Move/Copy data | MOV AX, BX |
| ADD | Addition | ADD AX, 5 |
| SUB | Subtraction | SUB BX, CX |
| MUL | Multiplication | MUL DX |
| JMP | Jump/Branch | JMP LABEL |
| CMP | Compare | CMP AX, BX |
3. High-Level Language
Characteristics:
- English-like syntax
- Portable across platforms
- Requires compiler/interpreter
- Easy to learn and write
β Portable across machines
β Faster development
β Better debugging tools
β Maintainable code
β Requires compiler/interpreter
β Less control over hardware
Popular High-Level Languages:
- C - System programming
- C++ - Object-oriented programming
- Java - Platform-independent
- Python - Scripting, AI/ML
- JavaScript -
Fastest
Constants Register MOV AX, BX Very Fast Temp data Direct MOV AX, [1000] Fast Variables Indirect MOV AX, [BX] Slow Pointers Indexed MOV AX, [BX+SI] Medium Arrays πΉ Instruction Types
DATA TRANSFER β MOV, LOAD, STORE ARITHMETIC β ADD, SUB, MUL, DIV LOGICAL β AND, OR, NOT, XOR CONTROL β JMP, CALL, RET I/O β IN, OUTπΉ Instruction Format
| Opcode | Operand(s) | Addressing Mode | Components: Opcode: Operation to perform Operand: Data or address Mode: How to access operandπΉ I/O Addressing
Memory-Mapped I/O
β Same instructions
β Reduces memory
Uses: MOV, LOAD
Isolated I/O
β Full memory available
β Faster
Uses: IN, OUT
πΉ Last-Minute Formula Sheet
β Addressable Memory = 2^n (n = address bus width) β 2's Complement = 1's complement + 1 β Range (n-bit 2's complement) = -2^(n-1) to +2^(n-1)-1 β Floating-Point = M Γ 2^E (M = Mantissa, E = Exponent)πΉ Important One-Liners for Exam
β ALU = Arithmetic & Logic operations
β CU = Controls all units
β Data bus is bidirectional
β Address bus is unidirectional
β 2's complement most widely used
β Booth's algorithm handles signed numbers
β Immediate addressing is fastest
β Machine cycle: F β D β E
β Registers faster than cache & memory
β PC holds next instruction addressπΉ Exam Tips
If question asks:- "Fastest addressing?" β Immediate or Register
- "Bidirectional bus?" β Data Bus
- "Signed numbers?" β 2's Complement
- "Real numbers?" β Floating-Point
- "Array access?" β Indexed Addressing
- "Controls CPU?" β Control Unit
- "Machine cycle steps?" β Fetch, Decode, Execute
- "32-bit address bus memory?" β 4 GB